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NOCS
2010
IEEE
10 years 22 days ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
ICCAD
2009
IEEE
161views Hardware» more  ICCAD 2009»
10 years 17 days ago
The epsilon-approximation to discrete VT assignment for leakage power minimization
As VLSI technology reaches 45nm technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, du...
Yujia Feng, Shiyan Hu
TCAD
2010
136views more  TCAD 2010»
9 years 9 months ago
Bounded Model Debugging
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...
Brian Keng, Sean Safarpour, Andreas G. Veneris
ISCAS
1995
IEEE
114views Hardware» more  ISCAS 1995»
10 years 6 months ago
Delta-Sigma Converters Using Frequency-Modulated Intermediate Values
Abstract— This paper describes a new first and secondorder delta-sigma modulator (DSM) concept where the first integrator is extracted and implemented by a FM oscillator with t...
Mats Erling Høvin, Alf Olsen, Tor Sverre La...
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