22 search results - page 2 / 5 » Variable Partitioning and Scheduling of Multiple Memory Arch... |
CODES
2001
IEEE
13 years 8 months ago
2001
IEEE
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
CASES
2001
ACM
13 years 8 months ago
2001
ACM
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
ICPADS
2006
IEEE
13 years 10 months ago
2006
IEEE
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
JPDC
2008
13 years 4 months ago
2008
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...