22 search results - page 3 / 5 » Variable Partitioning and Scheduling of Multiple Memory Arch... |
IEEEPACT
2000
IEEE
13 years 9 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
ASAP
1997
IEEE
13 years 9 months ago
1997
IEEE
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
RTAS
2010
IEEE
13 years 3 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...