175 search results - page 35 / 35 » Variant-based competitive parallel execution of sequential p... |
ISCA
2005
IEEE
13 years 10 months ago
2005
IEEE
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
IEEEPACT
1998
IEEE
13 years 9 months ago
1998
IEEE
Software fine-grain distributed shared memory (FGDSM) provides a simplified shared-memory programming interface with minimal or no hardware support. Originally software FGDSMs tar...
ISCA
2002
IEEE
13 years 4 months ago
2002
IEEE
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
ASM
2004
ASM
13 years 10 months ago
2004
ASM
For a while it seemed possible to pretend that all interaction between an algorithm and its environment occurs inter-step, but not anymore. Andreas Blass, Benjamin Rossman and the ...