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ASPDAC
2008
ACM
87views Hardware» more  ASPDAC 2008»
13 years 8 months ago
An efficient performance improvement method utilizing specialized functional units in Behavioral Synthesis
This paper proposes a novel Behavioral Synthesis method that improves performance of synthesized circuits utilizing specialized functional units effectively. Specialized functional...
Tsuyoshi Sadakata, Yusuke Matsunaga
ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
13 years 10 months ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
13 years 11 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
LCPC
2001
Springer
13 years 10 months ago
Bridging the Gap between Compilation and Synthesis in the DEFACTO System
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoun...
DAC
2005
ACM
14 years 7 months ago
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...