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» Verification via Structure Simulation
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CGO
2004
IEEE
13 years 9 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
AWPN
2008
311views Algorithms» more  AWPN 2008»
13 years 6 months ago
WoPeD 2.0 goes BPEL 2.0
WoPeD (Workflow Petrinet Designer) is an easy-to-use, Java-based open source software tool being developed at the University of Cooperative Education, Karlsruhe. WoPeD is able to e...
Andreas Eckleder, Thomas Freytag
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 5 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
CORR
2010
Springer
188views Education» more  CORR 2010»
13 years 5 months ago
A physically-based particle model of emergent crowd behaviors
This paper presents a modeling process in order to produce a realistic simulation of crowds in the ancient Greek agora of Argos. This place was a social theater in which two kinds...
Laure Heïgéas, Annie Luciani, Joë...
IM
2008
13 years 5 months ago
Directed Random Dot Product Graphs
In this paper we consider three models for random graphs that utilize the inner product as their fundamental object. We analyze the behavior of these models with respect to cluster...
Stephen J. Young, Edward R. Scheinerman