19 search results - page 1 / 4 » Verification-guided soft error resilience |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
TCAD
2008
13 years 4 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
BCS
2008
13 years 6 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE