1508 search results - page 3 / 302 » Versatile Processor Design for Efficiency and High Performan... |
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
VLSI
2007
Springer
13 years 11 months ago
2007
Springer
In this paper, we present an efficient H.264 / MPEG4 Part 10 Intra Frame Coder System. The system achieves real-time performance for portable applications with low hardware cost, ...
ASPLOS
1992
ACM
13 years 9 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
VLSID
2008
IEEE
14 years 5 months ago
2008
IEEE
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...