Sciweavers

38 search results - page 7 / 8
» Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low...
Sort
View
EUROSYS
2010
ACM
14 years 2 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
IPSN
2004
Springer
13 years 10 months ago
Adaptive clock synchronization in sensor networks
Recent advances in technology have made low cost, low power wireless sensors a reality. Clock synchronization is an important service in any distributed system, including sensor n...
Santashil PalChaudhuri, Amit Kumar Saha, David B. ...
BTW
2009
Springer
240views Database» more  BTW 2009»
13 years 6 months ago
Efficient Adaptive Retrieval and Mining in Large Multimedia Databases
Abstract: Multimedia databases are increasingly common in science, business, entertainment and many other applications. Their size and high dimensionality of features are major cha...
Ira Assent
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
13 years 5 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
CODES
2009
IEEE
14 years 1 days ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song