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DAC
2009
ACM
13 years 6 months ago
Way Stealing: cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
DAC
2009
ACM
14 years 5 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
HIPEAC
2010
Springer
13 years 6 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
13 years 11 months ago
Arithmetic optimization for custom instruction set synthesis
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...
Ajay K. Verma, Yi Zhu, Philip Brisk, Paolo Ienne
CASES
2005
ACM
13 years 6 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne