3 search results - page 1 / 1 » Whitespace redistribution for thermal via insertion in 3D st... |
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
: Thermal issue is a critical challenge in 3D IC circuit design. Incorporating thermal vias into 3D IC is a promising way to mitigate thermal issues by lowering down the thermal re...
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...