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DATE
2002
IEEE
120views Hardware» more  DATE 2002»
13 years 10 months ago
Wire Placement for Crosstalk Energy Minimization in Address Buses
We propose a novel approach to bus energy minimization that targets crosstalk effects. Unlike previous approaches, we try to reduce energy through capacitance optimization, by ad ...
Luca Macchiarulo, Enrico Macii, Massimo Poncino
GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
PATMOS
2004
Springer
13 years 10 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
14 years 5 months ago
A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan