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ASAP
2000
IEEE
142views Hardware» more  ASAP 2000»
13 years 9 months ago
Contention-Conscious Transaction Ordering in Embedded Multiprocessors
This paper explores the problem of efficiently ordering interprocessor communication operations in statically-scheduled multiprocessors for iterative dataflow graphs. In most digi...
Mukul Khandelia, Shuvra S. Bhattacharyya
DAC
2006
ACM
13 years 11 months ago
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
Rakesh Vattikonda, Wenping Wang, Yu Cao
DAC
2009
ACM
14 years 6 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
CIT
2006
Springer
13 years 9 months ago
Intelligent Query Tree (IQT) Protocol to Improve RFID Tag Read Efficiency
Radio Frequency Identification (RFID) is slated to become a standard for tagging various products. As more and more products become RFID enabled, fast tag identification mechanism...
Naval Bhandari, Anirudha Sahoo, Sridhar Iyer
MEMOCODE
2006
IEEE
13 years 11 months ago
A scenario-aware data flow model for combined long-run average and worst-case performance analysis
Data flow models are used for specifying and analysing signal processing and streaming applications. However, traditional data flow models are either not capable of expressing t...
Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen ...