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DAC
2003
ACM
13 years 11 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...
ICCAD
2003
IEEE
122views Hardware» more  ICCAD 2003»
14 years 2 months ago
Weibull Based Analytical Waveform Model
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...
Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail
DAC
2003
ACM
13 years 11 months ago
Efficient compression and application of deterministic patterns in a logic BIST architecture
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
Peter Wohl, John A. Waicukauski, Sanjay Patel, Min...
CIE
2005
Springer
13 years 7 months ago
Shrad: A Language for Sequential Real Number Computation
Since Di Gianantonio [1993] introduced his semantics for exact real omputation, there has always been a struggle to maintain data abstraction and efficiency as much as possible. T...
Amin Farjudian
USITS
2003
13 years 7 months ago
Using Random Subsets to Build Scalable Network Services
In this paper, we argue that a broad range of large-scale network services would benefit from a scalable mechanism for delivering state about a random subset of global participan...
Dejan Kostic, Adolfo Rodriguez, Jeannie R. Albrech...