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APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
13 years 10 months ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...
APCCAS
2006
IEEE
258views Hardware» more  APCCAS 2006»
13 years 10 months ago
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems
Abstract - This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13tm digital CMOS technology. Transistor-level simul...
Jesús Ruiz-Amaya, Manuel Delgado-Restituto,...
APCCAS
2006
IEEE
233views Hardware» more  APCCAS 2006»
13 years 10 months ago
Jointly Optimized Modulated-Transmitter and Receiver FIR MIMO Filters
— In recent years, several approaches have been proposed aiming the optimal joint design of finite impulse response (FIR) multiple-input multiple-output (MIMO) transmitter and r...
Guilherme Pinto, Paulo S. R. Diniz, Are Hjø...
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
13 years 10 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...