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APCSAC
2001
IEEE
9 years 29 days ago
Retargetable Cache Simulation Using High Level Processor Models
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
APCSAC
2001
IEEE
9 years 29 days ago
The SawMill Framework for Virtual Memory Diversity
We present a framework that allows applications to build and customize VM services on the L4 microkernel. While the L4 microkernel's abstractions are quite powerng these abst...
Mohit Aron, Jochen Liedtke, Kevin Elphinstone, Yoo...
APCSAC
2001
IEEE
9 years 29 days ago
High-Performance Extendable Instruction Set Computing
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
Heui Lee, Paul Becket, Bill Appelbe
APCSAC
2001
IEEE
9 years 29 days ago
Stacking them up: a Comparison of Virtual Machines
A popular trend in current software technology is to gain program portability by compiling programs to an inte form based on an abstract machine definition. Such approaches date b...
K. John Gough
APCSAC
2001
IEEE
9 years 29 days ago
Password-Capabilities: Their Evolution from the Password-Capability System into Walnut and Beyond
Since we first devised and defined password-capabilities as a new technique for building capability-based operating systems, a number of research systems around the world have use...
Ronald Pose
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