26 search results - page 4 / 6 » arith 2009 |
ARITH
2009
IEEE
14 years 18 days ago
2009
IEEE
We introduce a novel left-to-right leading digit first dual recoding of an operand for the purpose of designing the squaring operation on that operand. Our dual recoding yields an...
ARITH
2009
IEEE
14 years 18 days ago
2009
IEEE
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
ARITH
2009
IEEE
14 years 18 days ago
2009
IEEE
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
ARITH
2009
IEEE
14 years 18 days ago
2009
IEEE
The paper introduces fine-grain clockgating schemes for fused multiply-add-type floating-point units (FPU). The clockgating is based on instruction type, precision and operand v...
ARITH
2009
IEEE
14 years 18 days ago
2009
IEEE
The selection of the elements of the bases in an RNS modular multiplication method is crucial and has a great impact in the overall performance. This work proposes specific sets ...