9 search results - page 2 / 2 » arvlsi 1995 |
ARVLSI
1995
IEEE
13 years 9 months ago
1995
IEEE
This paper presents a new architecture style for the design of a parallel floating point multiplier. The proposed architecture is a synergy of trees and arrays. Architectural mod...
ARVLSI
1995
IEEE
13 years 9 months ago
1995
IEEE
The task of image acquisition is completely dominated by CCD-based sensors fabricated on specialized process lines. These devices provide an essentially passive means of detecting...
ARVLSI
1995
IEEE
13 years 9 months ago
1995
IEEE
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
ARVLSI
1995
IEEE
13 years 9 months ago
1995
IEEE
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...