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ATS
2009
IEEE
162views Hardware» more  ATS 2009»
14 years 4 days ago
Multi-tone Testing of Linear and Nonlinear Analog Circuits Using Polynomial Coefficients
—A method of testing for parametric faults of analog circuits based on a polynomial representation of fault-free function of the circuit is presented. The response of the circuit...
Suraj Sindia, Virendra Singh, Vishwani D. Agrawal
ATS
2009
IEEE
138views Hardware» more  ATS 2009»
14 years 4 days ago
Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks
Power distribution network (PDN) designs for today’s high performance integrated circuits (ICs) typically occupy a significant share of metal resources in the circuit, and henc...
Yubin Zhang, Lin Huang, Feng Yuan, Qiang Xu
ATS
2009
IEEE
111views Hardware» more  ATS 2009»
14 years 4 days ago
Dynamic Compaction in SAT-Based ATPG
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudha...
ATS
2009
IEEE
126views Hardware» more  ATS 2009»
14 years 4 days ago
Scan Chain Diagnosis by Adaptive Signal Profiling with Manufacturing ATPG Patterns
—In the past, software based scan chain defect diagnosis can be roughly classified into two categories (1) model-based algorithms, and (2) data-driven algorithms. In this paper w...
Yu Huang, Wu-Tung Cheng, Ruifeng Guo, Ting-Pu Tai,...
ATS
2009
IEEE
185views Hardware» more  ATS 2009»
14 years 4 days ago
Customized Algorithms for High Performance Memory Test in Advanced Technology Node
Embedded memory quality is critical to overall chip quality. New defect mechanisms that occur at advanced process nodes (65nm and below) are often more pronounced in memories due ...
Shomo Chen, Ning Huang, Ting-Pu Tai, Actel Niu