Customized Algorithms for High Performance Memory Test in Advanced Technology Node

Embedded memory quality is critical to overall chip quality. New defect mechanisms that occur at advanced process nodes (65nm and below) are often more pronounced in memories due to their high density and performance requirements. Traditional memory test algorithms are not sufficient to guarantee a low escape rate for these new memory defects. This paper describes 6 advanced test algorithms that address these shortcomings in order to maintain high memory test quality at smaller geometries.3 customized algorithms are focuses and described creation through innovative way especially.

• Type: Conference
• Year: 2009
• Where: ATS
• Authors: Shomo Chen, Ning Huang, Ting-Pu Tai, Actel Niu
• Keywords: ATS 2009, Hardware, Memory Test, Memory Test Algorithms, Memory Test Quality