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CERA
2002
134views more  CERA 2002»
13 years 6 months ago
Design Parameterization for Concurrent Design and Manufacturing of Mechanical Systems
Design changes are frequently encountered in the product development process. The complexity of the design changes is multiplied when the product design involves multiple engineer...
Javier Silva, Kuang-Hua Chang
TVLSI
2002
144views more  TVLSI 2002»
13 years 5 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
14 years 20 days ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
VMV
2001
91views Visualization» more  VMV 2001»
13 years 7 months ago
A Robust Procedure to Eliminate Degenerate Faces from Triangle Meshes
When using triangle meshes in numerical simulations or other sophisticated downstream applications, we have to guarantee that no degenerate faces are present since they have, e.g....
Mario Botsch, Leif Kobbelt
TVLSI
2008
111views more  TVLSI 2008»
13 years 6 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...