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CSREAESA
2006
13 years 7 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
CSREAESA
2006
13 years 7 months ago
Reliable Management Services for COTS-based Space Systems and Applications
Hybrid spacecraft processing platforms that combine radiation-hardened components with commercialgrade COTS components have the potential to dramatically improve performance while ...
Ian A. Troxel, Eric Grobelny, Grzegorz Cieslewski,...
CSREAESA
2006
13 years 7 months ago
Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
CSREAESA
2006
13 years 7 months ago
Generalized Deterministic Task Scheduling Algorithm for Embedded Real-Time Operating Systems
- In recent years, there has been a rapid and wide spread proliferation of non-traditional embedded computing platforms such as digital camcorders, cellular phones, and portable me...
Myoung-Jo Jung, Moon-Haeng Cho, Yong-Hee Kim, Cheo...
CSREAESA
2006
13 years 7 months ago
Design and Implementation of SoPC with Multi-Bus on a Chip
SoPC (System on a Programmable Chip) is one important kind of SoC solution based on PLD (Programmable Logic Device). At the same time, PBD (Platform-based Design) has become popul...
Fangjun Jian, Jizhong Han, Chengde Han, Qin Zhang,...