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DAC
1999
ACM
13 years 10 months ago
Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
Supamas Sirichotiyakul, Tim Edwards, Chanhee Oh, J...
DAC
1999
ACM
13 years 10 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...
DAC
1999
ACM
13 years 10 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...
DAC
2005
ACM
14 years 6 months ago
Simulation models for side-channel information leaks
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
Kris Tiri, Ingrid Verbauwhede
DAC
1999
ACM
14 years 6 months ago
Effective Iterative Techniques for Fingerprinting Design IP
While previous watermarking-based approaches to intellectual property protection (IPP) have asymmetrically emphasized the IP provider's rights, the true goal of IPP is to ens...
Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng...