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DAC
1999
ACM

Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor

9 years 2 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious problem. One solution is a novel method for functional test generation in which a transformed module is built manually, and which embodies functional constraints described using virtual logic. Test generation is then performed on the transformed module using commercial tools and the transformed module patterns are translated back to the processor level. However, the technique is useful only if the virtual logic can be generated automatically. This paper describes an automatic functional constraint extraction algorithm and a procedure to build the transformed module. We describe the tool, FALCON, used to extract the functional constraints of a given embedded module from a Verilog RTL model. The constraint extraction for embedded modules of benchmark processors using FALCON takes only a few seconds. We show that this...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A.
Added 02 Aug 2010
Updated 02 Aug 2010
Type Conference
Year 1999
Where DAC
Authors Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. Abraham
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