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FCCM
2006
IEEE
268views VLSI» more  FCCM 2006»
13 years 11 months ago
Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs
We present an architecture and an implementation of an FPGA-based sparse matrix-vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations ar...
Yousef El-Kurdi, Warren J. Gross, Dennis Giannacop...
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
13 years 11 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany
FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
13 years 8 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
13 years 11 months ago
Defect-Tolerant Nanocomputing Using Bloom Filters
We propose a novel defect-tolerant design methodology using Bloom filters for defect mapping for nanoscale computing devices. It is a general approach that can be used for any pe...
Gang Wang, Wenrui Gong, Ryan Kastner
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
13 years 11 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin