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    FPL
    1995
    Springer
    137views Hardware» more  FPL 1995»
    High-Speed Region Detection and Labeling Using an FPGA Based Custom Computing Platform
    13 years 9 months ago
    High-Speed Region Detection and Labeling Using an FPGA Based Custom Computing Platform
    Download  www.ccm.ece.vt.edu
    General purpose custom computing platforms, such as Splash-2, have demonstrated the ability to enter mainstream computing not only due to their near application-specific speeds bu...
    Ramana V. Rachakonda, Peter M. Athanas, A. Lynn Ab...
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    FPGA
    1995
    ACM
    113views FPGA» more  FPGA 1995»
    High-Energy Physics on DECPeRLe-1 Programmable Active Memory
    13 years 9 months ago
    High-Energy Physics on DECPeRLe-1 Programmable Active Memory
    Download  www.cecs.uci.edu
    The future Large Hadron Collider (LHC) to be built at CERN1, by the turn of the millenium, provides an ample source of challenging real-time computational problems. We report here...
    Laurent Moll, Jean Vuillemin, Philippe Boucard
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    ISCAS
    1995
    IEEE
    91views Hardware» more  ISCAS 1995»
    An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
    13 years 9 months ago
    An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
    Download  www.cecs.uci.edu
    Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
    W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
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    DAC
    1995
    ACM
    130views Computer Architecture» more  DAC 1995»
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    13 years 9 months ago
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    Download  www.cecs.uci.edu
    We propose a novel optimization scheme that can improve the routing by reducing a newly observed router decaying effect. A pair of greedy-grow algorithms, each emphasizing a diffe...
    Yu-Liang Wu, Malgorzata Marek-Sadowska
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    FPGA
    1995
    ACM
    93views FPGA» more  FPGA 1995»
    Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
    13 years 9 months ago
    Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
    Download  fmdb.cs.ucla.edu
    In this paper, we present an improvement of the FlowMap algorithm, named CutMap, which combines depth and area minimization in the mapping process by computing min-cost min-height...
    Jason Cong, Yean-Yow Hwang
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