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IPPS
1999
IEEE
13 years 10 months ago
Reusable Internal Hardware Templates
This paper describes the framework of internal hardware templates. These reusable templates can be instantiated, inside the FPGA, to the required precision. Thus, the resource util...
Ka-an Agun, J. Morris Chang
FCCM
1999
IEEE
146views VLSI» more  FCCM 1999»
13 years 10 months ago
Sepia: Scalable 3D Compositing Using PCI Pamette
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
Laurent Moll, Mark Shand, Alan Heirich
DAC
1999
ACM
13 years 10 months ago
Dynamically Reconfigurable Architecture for Image Processor Applications
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Alexandro M. S. Adário, Eduardo L. Roehe, S...
DAC
1999
ACM
13 years 10 months ago
A Practical Approach to Multiple-Class Retiming
Retiming is an optimization technique for synchronous circuits introduced by Leiserson and Saxe in 1983. Although powerful, retiming is not very widely used because it does not ha...
Klaus Eckl, Jean Christophe Madre, Peter Zepter, C...
EH
1999
IEEE
141views Hardware» more  EH 1999»
13 years 10 months ago
On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16bit address space into an 8-bit one. The target technology is FPGA,...
Ernesto Damiani, Andrea Tettamanzi, Valentino Libe...