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FPL
2005
Springer
98views Hardware» more  FPL 2005»
13 years 10 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
FPL
2005
Springer
119views Hardware» more  FPL 2005»
13 years 10 months ago
Real-Time Feature Extraction for High Speed Networks
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Al...
FPL
2005
Springer
140views Hardware» more  FPL 2005»
13 years 10 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel
FPL
2005
Springer
139views Hardware» more  FPL 2005»
13 years 10 months ago
Mullet - A Parallel Multiplier Generator
A module generator called Mullet for producing near-optimal parallel multipliers in a technology independent manner is presented. Using this tool, a large number of candidate desi...
Kuen Hung Tsoi, Philip Heng Wai Leong
FPL
2005
Springer
149views Hardware» more  FPL 2005»
13 years 10 months ago
Heterogeneity Exploration for Multiple 2D Filter Designs
Many image processing applications require fast convolution of an image with a set of large 2D filters. Field - Programmable Gate Arrays (FPGAs) are often used to achieve this go...
Christos-Savvas Bouganis, Peter Y. K. Cheung, Geor...