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FPL
2009
Springer
105views Hardware» more  FPL 2009»
13 years 10 months ago
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming
As a step torward a viable, single-issue out-of-order soft core, this work presents Copy-Free Checkpointing (CFC), an FPGA-friendly register renaming design. CFC supports speculat...
Kaveh Aasaraai, Andreas Moshovos
FPL
2009
Springer
78views Hardware» more  FPL 2009»
13 years 10 months ago
FPGA-accelerated Information Retrieval: High-efficiency document filtering
Power consumption in data centres is a growing issue as the cost of the power for computation and cooling has become dominant. An emerging challenge is the development of “envir...
Wim Vanderbauwhede, Leif Azzopardi, Mahmoud Moadel...
FPL
2009
Springer
142views Hardware» more  FPL 2009»
13 years 9 months ago
Cooperative multithreading in dynamically reconfigurable systems
Preemptive multitasking, a popular technique for timesharing of computational resources in software-based systems, faces considerable difficulties when applied to partially reconf...
Enno Lübbers, Marco Platzner
FPL
2009
Springer
106views Hardware» more  FPL 2009»
13 years 8 months ago
An ASIC perspective on FPGA optimizations
In this paper we discuss how various design components perform in both FPGAs and standard cell based ASICs. We also investigate how various common FPGA optimizations will effect t...
Andreas Ehliar, Dake Liu
FPL
2009
Springer
113views Hardware» more  FPL 2009»
13 years 10 months ago
Clock duplicity for high-precision timestamping in Gigabit Ethernet
Hardware-timestamping is essential for achieving tight synchronization in networking applications. This mechanism is selectively used on few high-cost tailored systems. Actual μP...
Carles Nicolau, Dolors Sala, Enrique Cantó