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FPL
2009
Springer
162views Hardware» more  FPL 2009»
13 years 10 months ago
A comparison of FPGA and FPAA technologies for a signal processing application
This paper presents a comparison between two technologies for reconfigurable circuits that are FPGA'se the FPAA's. The comparison is based on a case study of the area of...
Roberto Selow, Heitor S. Lopes, Carlos R. Erig Lim...
FPL
2009
Springer
166views Hardware» more  FPL 2009»
13 years 10 months ago
Modeling post-techmapping and post-clustering FPGA circuit depth
This paper presents an analytical model that relates FPGA architectural parameters to the expected speed of FPGA implementation. More precisely, the model relates the lookuptable ...
Joydip Das, Steven J. E. Wilton, Philip Heng Wai L...
FPL
2009
Springer
105views Hardware» more  FPL 2009»
13 years 10 months ago
Run-time resource management in fault-tolerant network on reconfigurable chips
This paper investigates the challenges of run-time resource management in future coarse-grained network-onreconfigurable-chips (NoRCs). Run-time reconfiguration is a key feature e...
Mohammad Hosseinabady, José L. Nú&nt...
FPL
2009
Springer
115views Hardware» more  FPL 2009»
13 years 10 months ago
Recursion in reconfigurable computing: A survey of implementation approaches
Reconfigurable systems are widely used nowadays to increase performance of computationally intensive applications. There exist a lot of synthesis tools that automatically generate...
Iouliia Skliarova, Valery Sklyarov
FPL
2009
Springer
132views Hardware» more  FPL 2009»
13 years 10 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem