Sciweavers

44 search results - page 4 / 9
» iccad 1996
Sort
View
ICCAD
1996
IEEE
102views Hardware» more  ICCAD 1996»
13 years 9 months ago
Bit-flipping BIST
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...
Hans-Joachim Wunderlich, Gundolf Kiefer
ICCAD
1996
IEEE
106views Hardware» more  ICCAD 1996»
13 years 9 months ago
A general dispersive multiconductor transmission line model for interconnect simulation in SPICE
Although numerous methods have been proposed for interconnect simulation, no single model exists for all kind of transmission line problems. This paper presents a new, single, gen...
Mustafa Celik, Andreas C. Cangellaris
ICCAD
1996
IEEE
77views Hardware» more  ICCAD 1996»
13 years 9 months ago
Power optimization in disk-based real-time application specific systems
While numerous power optimization techniques have been at all levels of design process abstractions for electronic components, until now, power minimization in mixed mechanical-el...
Inki Hong, Miodrag Potkonjak
ICCAD
1996
IEEE
92views Hardware» more  ICCAD 1996»
13 years 9 months ago
Generation of BDDs from hardware algorithm descriptions
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
Shin-ichi Minato
ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
13 years 9 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs