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ICES
2003
Springer
151views Hardware» more  ICES 2003»
13 years 10 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
ICES
2003
Springer
86views Hardware» more  ICES 2003»
13 years 10 months ago
A Note on Designing Logical Circuits Using SAT
Abstract. We present a systematic procedure for the synthesis and minimisation of digital circuits using propositional satisfiability. We encode the truth table into a canonical s...
Giovani Gomez Estrada
ICES
2003
Springer
165views Hardware» more  ICES 2003»
13 years 10 months ago
Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms
This paper proposes a coprocessor architecture to speed up hardware evolution. It is designed to be implemented in an FPGA with an integrated microprocessor core. The coprocessor r...
Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Me...
ICES
2003
Springer
112views Hardware» more  ICES 2003»
13 years 10 months ago
Using Negative Correlation to Evolve Fault-Tolerant Circuits
In this paper, we show how artificial evolution can be used to improve the fault-tolerance of electronic circuits. We show that evolution is able to improve the fault tolerance of...
Thorsten Schnier, Xin Yao
ICES
2003
Springer
93views Hardware» more  ICES 2003»
13 years 10 months ago
A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...