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» ipPROCESS: Using a Process to Teach IP-Core Development
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MSE
2005
IEEE
153views Hardware» more  MSE 2005»
13 years 10 months ago
ipPROCESS: Using a Process to Teach IP-Core Development
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
Marilia Lima, Andre Aziz, Diogo José Costa ...
MSE
2003
IEEE
103views Hardware» more  MSE 2003»
13 years 10 months ago
Teaching IP Core Development: An Example
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
Aleksandar Milenkovic, David Fatzer
DDECS
2009
IEEE
146views Hardware» more  DDECS 2009»
13 years 8 months ago
Enhanced LEON3 core for superscalar processing
Low power consumption and high-performance are two main directions in the development of modern microprocessor architectures. In general they are two excluding branches of System-o...
Krzysztof Marcinek, Arkadiusz W. Luczyk, Witold A....
ICASSP
2008
IEEE
13 years 11 months ago
Accurate models for estimating area and power of FPGA implementations
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabar...
CGF
2007
151views more  CGF 2007»
13 years 4 months ago
Teaching, Exploring, Learning - Developing Tutorials for In-Class Teaching and Self-Learning
This paper presents an experience report on a novel approach for a course on intermediate and advanced computer graphics topics. The approach uses Teachlet Tutorials, a combinatio...
Steffi Beckhaus, Kristopher J. Blom