27 search results - page 5 / 6 » isca 2012 |
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Dynamic random-access memory (DRAM) is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent loss of data. These refresh operation...
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
The emergence of global-scale online services has galvanized scale-out software, characterized by splitting vast datasets and massive computation across many independent servers. ...
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...