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ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
14 years 1 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
14 years 5 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ICCD
2003
IEEE
130views Hardware» more  ICCD 2003»
14 years 1 months ago
On Combining Pinpoint Test Set Relaxation and Run-Length Codes for Reducing Test Data Volume
This paper presents a pinpoint test set relaxation method for test compression that maximally derives the capability of a run-length encoding technique such as Golomb coding or fr...
Seiji Kajihara, Yasumi Doi, Lei Li, Krishnendu Cha...
VTS
2003
IEEE
119views Hardware» more  VTS 2003»
13 years 10 months ago
Test Data Compression Using Dictionaries with Fixed-Length Indices
—We present a dictionary-based test data compression approach for reducing test data volume and testing time in SOCs. The proposed method is based on the use of a small number of...
Lei Li, Krishnendu Chakrabarty