Sciweavers

309 search results - page 59 / 62
» iscas 2007
Sort
View
DAC
2007
ACM
14 years 6 months ago
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
Tao Li, Zhiping Yu
DATE
2007
IEEE
130views Hardware» more  DATE 2007»
14 years 4 days ago
A novel criticality computation method in statistical timing analysis
Abstract— The impact of process variations increases as technology scales to nanometer region. Under large process variations, the path and arc/node criticality [18] provide effe...
Feng Wang 0004, Yuan Xie, Hai Ju
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
14 years 4 days ago
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon W...
GLVLSI
2007
IEEE
111views VLSI» more  GLVLSI 2007»
14 years 3 days ago
Probabilistic gate-level power estimation using a novel waveform set method
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Ein...
GLVLSI
2007
IEEE
114views VLSI» more  GLVLSI 2007»
14 years 3 days ago
Design of mixed gates for leakage reduction
Leakage power dissipation is one of the most critical factors for the overall current dissipation and future designs. However, design techniques for the reduction of leakage power...
Frank Sill, Jiaxi You, Dirk Timmermann