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ISVLSI
2008
IEEE
158views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Improving Energy Efficiency of Configurable Caches via Temperature-Aware Configuration Selection
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
ISVLSI
2008
IEEE
104views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations
In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and ban...
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Pa...
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
13 years 11 months ago
System Level Design Space Exploration for Multiprocessor System on Chip
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
Issam Maalej, Guy Gogniat, Jean Luc Philippe, Moha...
ISVLSI
2008
IEEE
118views VLSI» more  ISVLSI 2008»
13 years 11 months ago
MPI-Based Adaptive Task Migration Support on the HS-Scale System
Scalability of architecture, programming model and task control management will be a major challenge for future VLSI systems. In this context, homogeneous MPSOC is a seducing appr...
Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatel...
ISVLSI
2008
IEEE
129views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Smart-NICs: Power Proxying for Reduced Power Consumption in Network Edge Devices
The number of edge devices connected to the Internet is increasing at a rapid rate. To maintain network connectivity, the majority of these devices remain completely powered on wh...
Karthik Sabhanatarajan, Ann Gordon-Ross, Mark Oden...