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ITC
1996
IEEE

98views Hardware» more ITC 1996»

Mixed-Mode BIST Using Embedded Processors

13 years 9 months ago

Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...

Sybille Hellebrand, Hans-Joachim Wunderlich, Andre...

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12

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ITC
1996
IEEE

78views Hardware» more ITC 1996»

Realistic-Faults Mapping Scheme for the Fault Simulation of Integrated Analogue CMOS Circuits

13 years 9 months ago

Download www.tet.uni-hannover.de

common use is the distinction into two (abstract) fault models: A new fault modelling scheme for integrated analogue general the "Single Hard Fault Model (SHFM)" and the ...

Michael J. Ohletz

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14

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ITC
1996
IEEE

127views Hardware» more ITC 1996»

Altering a Pseudo-Random Bit Sequence for Scan-Based BIST

13 years 9 months ago

Download crc.stanford.edu

This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...

Nur A. Touba, Edward J. McCluskey

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15

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ITC
1996
IEEE

107views Hardware» more ITC 1996»

Orthogonal Scan: Low-Overhead Scan for Data Paths

13 years 9 months ago

Download www-crc.stanford.edu

Orthogonal scan paths, which follow the path of the data flow, can be used in data path designs to reduce the test overhead -- area, delay and test application time -- by sharing ...

Robert B. Norwood, Edward J. McCluskey

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