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ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
The advantage to “one test at a time” fault diagnosis is its ability to implicate the components of complicated defect behaviors. The disadvantage is the large size and opacit...
ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
With increasing chip interconnect distances, openinterconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-lif...
ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
: We present a Built-In Self-Test (BIST)-based diagnostic approach for the programmable interconnect resources in Field Programmable Gate Arrays (FPGAs) that can be used for either...
ITC
2002
IEEE
13 years 10 months ago
2002
IEEE
The continued market demand for GHz processors and high-capacity communication systems results in an increasing number of low-cost high volume ICs with multi-GHz clocks and/or mul...