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ASPDAC
2000
ACM
79views Hardware» more  ASPDAC 2000»
13 years 9 months ago
VLSI implementation of rake receiver for IS-95 CDMA Testbed using FPGA
Oliver Yuk-Hang Leung, Chi-Ying Tsui, Roger S. Che...
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
ASPDAC
2000
ACM
71views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Self-reforming routing for stochastic search in VLSI interconnection layout
Yukiko Kubo, Yasuhiro Takashima, Shigetoshi Nakata...
ASPDAC
2000
ACM
159views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Analytical minimization of half-perimeter wirelength
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
Andrew A. Kennings, Igor L. Markov
ASPDAC
2000
ACM
111views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Gate-level aged timing simulation methodology for hot-carrier reliability assurance
- This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a un...
Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezaw...
ASPDAC
2000
ACM
83views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs
Byungil Jeong, Sungjoo Yoo, Sunghyun Lee, Kiyoung ...
ASPDAC
2000
ACM
107views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Taiwan foundry for system-in-package (SIP)
-- System-In-Package (SIP) is a cost-effective alternative to System-On-Chip (SOC) and chips with embedded memory. The key elements of SIP technology include I/O redistribution, so...
Albert Lin
ASPDAC
2000
ACM
78views Hardware» more  ASPDAC 2000»
13 years 9 months ago
A sigma-delta modulation based BIST scheme for mixed-signal circuits
In this work, we present the analysis of a built-in self-test (BIST) scheme for mixed-signal circuits that is intended to provide on-chip stimulus generation and response analysis...
Jiun-Lang Huang, Kwang-Ting Cheng