Sciweavers

RTS
2006
129views more  RTS 2006»
13 years 4 months ago
Modeling out-of-order processors for WCET analysis
Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typic...
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra
12
Voted
IJAIT
2008
99views more  IJAIT 2008»
13 years 4 months ago
Optimal Basic Block Instruction Scheduling for Multiple-Issue Processors Using Constraint Programming
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction sch...
Abid M. Malik, Jim McInnes, Peter van Beek
HEURISTICS
2008
92views more  HEURISTICS 2008»
13 years 4 months ago
Learning heuristics for basic block instruction scheduling
Instruction scheduling is an important step for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction scheduling is to ...
Abid M. Malik, Tyrel Russell, Michael Chase, Peter...
ISCAPDCS
2001
13 years 6 months ago
A Multiple Blocks Fetch Engine for High Performance Superscalar Processors
The implementation of modern high performance computer is increasingly directed toward parallelism in the hardware. However, most of the current fetch units are limited to one bra...
Yung-Chung Wu, Jong-Jiann Shieh
MICRO
1992
IEEE
124views Hardware» more  MICRO 1992»
13 years 8 months ago
A shape matching approach for scheduling fine-grained parallelism
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
Brian A. Malloy, Rajiv Gupta, Mary Lou Soffa
POPL
1994
ACM
13 years 8 months ago
Dominators, Super Blocks, and Program Coverage
In this paper we present techniques to nd subsets of nodes of a owgraph that satisfy the followingproperty: A test set that exercises all nodes in a subset exercises allnodes in t...
Hiralal Agrawal
ISCAS
1999
IEEE
66views Hardware» more  ISCAS 1999»
13 years 8 months ago
Low energy register allocation beyond basic blocks
An approach of doing register allocation beyond basic blocks for low energy is presented in this paper. With careful analysis of boundary conditions between consecutive blocks, ou...
Yumin Zhang, Xiaobo Hu, Danny Z. Chen
PLDI
2000
ACM
13 years 9 months ago
Optimal instruction scheduling using integer programming
{ This paper presents a new approach to local instruction scheduling based on integer programming that produces optimal instruction schedules in a reasonable time, even for very la...
Kent D. Wilken, Jack Liu, Mark Heffernan
PLDI
2000
ACM
13 years 9 months ago
Exploiting superword level parallelism with multimedia instruction sets
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
Samuel Larsen, Saman P. Amarasinghe