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DATE
2004
IEEE
132views Hardware» more  DATE 2004»
13 years 8 months ago
LZW-Based Code Compression for VLIW Embedded Systems
We propose a new variable-sized-block method for VLIW code compression. Code compression traditionally works on fixed-sized blocks and its efficiency is limited by the small block...
Chang Hong Lin, Yuan Xie, Wayne Wolf
IEEEPACT
2000
IEEE
13 years 9 months ago
Dynamic Branch Prediction for a VLIW Processor
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
Jan Hoogerbrugge
SAC
2006
ACM
13 years 11 months ago
Branchless cycle prediction for embedded processors
Modern embedded processors access the Branch Target Buffer (BTB) every cycle to speculate branch target addresses. Such accesses, quite often, are unnecessary as there is no branc...
Kaveh Jokar Deris, Amirali Baniasadi
ISPASS
2009
IEEE
13 years 11 months ago
Experiment flows and microbenchmarks for reverse engineering of branch predictor structures
Insights into branch predictor organization and operation can be used in architecture-aware compiler optimizations to improve program performance. Unfortunately, such details are ...
Vladimir Uzelac, Aleksandar Milenkovic