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ASPDAC
2005
ACM
140views Hardware» more  ASPDAC 2005»
13 years 10 months ago
A multi-level transmission line network approach for multi-giga hertz clock distribution
-In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
Hongyu Chen, Chung-Kuan Cheng
ASYNC
2005
IEEE
97views Hardware» more  ASYNC 2005»
13 years 10 months ago
Self-Timed Circuitry for Global Clocking
We present an apparatus used to distribute a timing reference or clock across the extent of a digital system. Selftimed circuitry both generates and distributes a clock signal, wh...
Scott Fairbanks, Simon W. Moore
ISVLSI
2006
IEEE
88views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Effects of Parameter Variations and Crosstalk Noise on H-Tree Clock Distribution Networks
— The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular...
Itisha Chanodia, Dimitrios Velenis
ICCAD
2008
IEEE
117views Hardware» more  ICCAD 2008»
13 years 11 months ago
A novel sequential circuit optimization with clock gating logic
— To save power consumption, it has been shown that the clock signal can be gated without changing the functionality under certain clock-gating conditions. We observe that the cl...
Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang