Sciweavers

CODES
2007
IEEE
13 years 11 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
CODES
2007
IEEE
13 years 11 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
CODES
2007
IEEE
13 years 11 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
CODES
2007
IEEE
13 years 11 months ago
Embedded software development on top of transaction-level models
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
Wolfgang Klingauf, Robert Günzel, Christian S...
CODES
2007
IEEE
13 years 11 months ago
Smart driver for power reduction in next generation bistable electrophoretic display technology
Microencapsulated electrophoretic displays (EPDs) are quickly emerging as an important technology for use in battery-powered portable computing devices. Thanks to bistability and ...
Michael A. Baker, Aviral Shrivastava, Karam S. Cha...
CODES
2007
IEEE
13 years 11 months ago
Probabilistic performance risk analysis at system-level
We present a novel hybrid approach for performance analysis of a system design. Unlike other approaches in this area, in this paper we do not focus on the determination of pessimi...
Alexander Viehl, Markus Schwarz, Oliver Bringmann,...
CODES
2007
IEEE
13 years 11 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
Mark Thompson, Hristo Nikolov, Todor Stefanov, And...
CODES
2007
IEEE
13 years 11 months ago
Bridging gap between simulation and spreadsheet study
Antoine Perrin, Frank Ghenassia
CODES
2007
IEEE
13 years 11 months ago
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems
We propose a method for dynamic security domain scaling on SMPs that offers both highly scalable performance and high security for future high-end embedded systems. Its most impor...
Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji ...
CODES
2007
IEEE
13 years 11 months ago
Improved response time analysis of tasks scheduled under preemptive Round-Robin
Round-Robin scheduling is the most popular time triggered scheduling policy, and has been widely used in communication networks for the last decades. It is an efficient schedulin...
Razvan Racu, Li Li, Rafik Henia, Arne Hamann, Rolf...