Sciweavers

CHES
2005
Springer
281views Cryptology» more  CHES 2005»
13 years 11 months ago
Data Remanence in Flash Memory Devices
Data remanence is the residual physical representation of data that has been erased or overwritten. In non-volatile programmable devices, such as UV EPROM, EEPROM or Flash, bits ar...
Sergei P. Skorobogatov
CHES
2005
Springer
100views Cryptology» more  CHES 2005»
13 years 11 months ago
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...
Thomas Popp, Stefan Mangard
CHES
2005
Springer
123views Cryptology» more  CHES 2005»
13 years 11 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...
CHES
2005
Springer
99views Cryptology» more  CHES 2005»
13 years 11 months ago
Short Memory Scalar Multiplication on Koblitz Curves
Abstract. We present a new method for computing the scalar multiplication on Koblitz curves. Our method is as fast as the fastest known technique but requires much less memory. We ...
Katsuyuki Okeya, Tsuyoshi Takagi, Camille Vuillaum...
CHES
2005
Springer
111views Cryptology» more  CHES 2005»
13 years 11 months ago
Hardware Acceleration of the Tate Pairing in Characteristic Three
Although identity based cryptography offers many functional advantages over conventional public key alternatives, the computational costs are significantly greater. The core comp...
Philipp Grabher, Dan Page
CHES
2005
Springer
146views Cryptology» more  CHES 2005»
13 years 11 months ago
AES on FPGA from the Fastest to the Smallest
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
Tim Good, Mohammed Benaissa
CHES
2005
Springer
155views Cryptology» more  CHES 2005»
13 years 11 months ago
Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization
Motivated by the goal of factoring large integers using the Number Field Sieve, several special-purpose hardware designs have been recently proposed for solving large sparse system...
Willi Geiselmann, Adi Shamir, Rainer Steinwandt, E...
CHES
2005
Springer
108views Cryptology» more  CHES 2005»
13 years 11 months ago
Further Hidden Markov Model Cryptanalysis
We extend the model of Karlof and Wagner for modelling side channel attacks via Input Driven Hidden Markov Models (IDHMM) to the case where not every state corresponds to a single ...
P. J. Green, Richard Noad, Nigel P. Smart