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CHES
2003
Springer
104views Cryptology» more  CHES 2003»
9 years 1 months ago
Power-Analysis Attacks on an FPGA - First Experimental Results
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular, especially for rapid prototyping. For implementations of cryptographic algorithms, not only the speed and ...
Siddika Berna Örs, Elisabeth Oswald, Bart Pre...
CHES
2003
Springer
115views Cryptology» more  CHES 2003»
9 years 1 months ago
The Doubling Attack - Why Upwards Is Better than Downwards
The recent developments of side channel attacks have lead implementers to use more and more sophisticated countermeasures in critical operations such as modular exponentiation, or ...
Pierre-Alain Fouque, Frédéric Valett...
CHES
2003
Springer
149views Cryptology» more  CHES 2003»
9 years 1 months ago
Attacking Unbalanced RSA-CRT Using SPA
Abstract. Efficient implementations of RSA on computationally limited devices, such as smartcards, often use the CRT technique in combination with Garner’s algorithm in order to ...
Pierre-Alain Fouque, Gwenaëlle Martinet, Guil...
CHES
2003
Springer
151views Cryptology» more  CHES 2003»
9 years 1 months ago
Attacking RSA-Based Sessions in SSL/TLS
Vlastimil Klíma, Ondrej Pokorný, Tom...
CHES
2003
Springer
88views Cryptology» more  CHES 2003»
9 years 1 months ago
A New Algorithm for Switching from Arithmetic to Boolean Masking
To protect a cryptographic algorithm against Differential Power Analysis, a general method consists in masking all intermediate data with a random value. When a cryptographic algo...
Jean-Sébastien Coron, Alexei Tchulkine
CHES
2003
Springer
97views Cryptology» more  CHES 2003»
9 years 1 months ago
On the Security of PKCS#11
Jolyon Clulow
CHES
2003
Springer
135views Cryptology» more  CHES 2003»
9 years 1 months ago
A Practical Countermeasure against Address-Bit Differential Power Analysis
Kouichi Itoh, Tetsuya Izu, Masahiko Takenaka
CHES
2003
Springer
247views Cryptology» more  CHES 2003»
9 years 1 months ago
Very Compact FPGA Implementation of the AES Algorithm
Abstract. In this paper a compact FPGA architecture for the AES algorithm with 128-bit key targeted for low-cost embedded applications is presented. Encryption, decryption and key ...
Pawel Chodowiec, Kris Gaj
CHES
2003
Springer
119views Cryptology» more  CHES 2003»
9 years 1 months ago
Faster Double-Size Modular Multiplication from Euclidean Multipliers
Abstract. A novel technique for computing a 2n-bit modular multiplication using n-bit arithmetic was introduced at CHES 2002 by Fischer and Seifert. Their technique makes use of an...
Benoît Chevallier-Mames, Marc Joye, Pascal P...
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