DAC
2009
ACM
14 years 5 months ago
2009
ACM
In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing,...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
In this paper we introduce a new method of performing direct solution of the harmonic balance Jacobian. For examples with moderate number of harmonics and moderate to strong nonli...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
DAC
2009
ACM
14 years 5 months ago
2009
ACM
This paper describes a function-based timing-driven optimization technique for the synthesis of multi-level logic circuits. Motivated by the principles of parallel prefix computat...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Metal-only ECO realizes the last-minute design changes by revising the photomasks of metal layers only. This task is challenging because the pre-injected spare cells are limited b...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...