Sciweavers

IPPS
1998
IEEE
13 years 9 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
ICDCS
2002
IEEE
13 years 10 months ago
Scheduling Real-Time Data Items In Multiple Channels And Multiple Receivers Environments
In the real-time environments, information is disseminated to clients with timing constraint. In this paper, we focus on the real time data scheduling problem in multiple broadcas...
Guanling Lee, Yi-Ning Pan, Arbee L. P. Chen
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
13 years 10 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...