Sciweavers

DATE
2008
IEEE
199views Hardware» more  DATE 2008»
13 years 11 months ago
Safe Automatic Flight Back and Landing of Aircraft Flight Reconfiguration Function (FRF)
SOFIA (Safe Automatic Flight Back and Landing of Aircraft) project is a response to the challenge of developing concepts and techniques enabling the safe and automatic return to g...
Juan Alberto Herreria Garcia
DATE
2008
IEEE
108views Hardware» more  DATE 2008»
13 years 11 months ago
CASP: Concurrent Autonomous Chip Self-Test Using Stored Test Patterns
CASP, Concurrent Autonomous chip self-test using Stored test Patterns, is a special kind of self-test where a system tests itself concurrently during normal operation without any ...
Yanjing Li, Samy Makar, Subhasish Mitra
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
13 years 11 months ago
Architecture Exploration of NAND Flash-based Multimedia Card
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
Sungchan Kim, Chanik Park, Soonhoi Ha
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
13 years 11 months ago
Compositional, dynamic cache management for embedded chip multiprocessors
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
DATE
2008
IEEE
68views Hardware» more  DATE 2008»
13 years 11 months ago
Efficient Representation and Analysis of Power Grids
João M. S. Silva, Joel R. Phillips, Luis Mi...
DATE
2008
IEEE
142views Hardware» more  DATE 2008»
13 years 11 months ago
Approximate logic circuits for low overhead, non-intrusive concurrent error detection
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
Mihir R. Choudhury, Kartik Mohanram
DATE
2008
IEEE
170views Hardware» more  DATE 2008»
13 years 11 months ago
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
Duo Li, Sheldon X.-D. Tan, Bruce McGaughy
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
13 years 11 months ago
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
13 years 11 months ago
A methodology for improving software design lifecycle in embedded control systems
Control design and real-time implementation are usually performed in isolation. The effects of the computer implementation on control system performance are still evaluated on the...
Mohamed El Mongi Ben Gaid, Rémy Kocik, Yves...