DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
To achieve minimum signal propagation delay, the nonuniform wire width routing architecture has been widely used in modern VLSI design. The non-uniform routing architecture exploi...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper provides insight into the novel solutions used to build SoCs targeting increased productivity in a complex environment. Design of such SoCs relies on multi-team, multi-...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
A new temperature compensation technique for ringoscillator-based ADC is proposed in this paper. It employs a novel fixed-number-based algorithm and a CTAT current biasing technol...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper describes ongoing research in the field of quantitative productivity measurement in IC Design and simulation of different scenarios as decision support. Five topics out...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
— In the face of increased process variations, at-speed manufacturing test is necessary to detect subtle delay defects. This procedure necessarily tests chips at a slightly highe...